BASIC CONCEPTS -- POLES AND ZEROS:
These are the frequency domain frequency manipulating concepts. A
pole causes the frequency response to tip "clockwise" at 6 dB per
octave (20 dB per decade). A zero causes the frequency response to
tip "counterclockwise" at 6 dB per octave. At the "corner" frequency,
the response is altered by 3 dB and by 45 degrees. (A clockwise bend
is 45 degrees lag, a counterclockwise bend is 45 degrees lead).
Poles can be "bought" for your intended circuit fairly cheaply,
while zeros usually "cost". An example of a pole is an RC network:
series resistor, capacitor to ground. This has the pole at the
frequency f=1/(2*pi*r*c). It also has a zero at "infinite frequency".
A coupling network (series c, r to ground) has a zero at DC (zero
frequency) and a pole at the expected f=1/(2*pi*r*c).
Example: RIAA phono characteristic: Pole at 50 Hz, Zero at 500 Hz,
Pole at 2120 Hz. (Usually there is also at least one zero at DC and
a matching pole at 10 to 20 Hz).
Frequency Response Rule of Thumb:
Frequency response is usually graphed dB wise on the vertical axis,
and logarithmic frequency wise on the horizontal axis. In this
manner, a pole or zero is modeled as a straight line whose slope
is 6 dB per octave. Example: Pole at 1000 Hz: Frequency is "flat"
below 1 kHz, and the slope is 6 dB per octave above 1kHz (e.g. -6 dB
at 2 kHz, -12 dB at 4 kHz, -20 dB at 10kHz). The "real" or "exact"
frequency response departs from this idealized straight line
approach in a rather "nice" way. The "error" is 3 dB at the corner
and decreases to 1 dB at an octave away, and decreases to 0.3 dB
2 octaves away, 0.1 dB 3 octaves away, 0.03 dB 4 octaves away etc.
Thus, in our example (pole at 1kHz), response is "flat" at DC,
down 0.1 dB at 125 Hz, down 0.3 dB at 250 Hz, down 1 dB at 500 Hz,
down 3 dB at 1 kHz, down 7 dB at 2 kHz (6 dB + 1 dB error term),
down 12.3 dB at 4 kHz and down 18.1 dB at 8 kHz.
BASIC CONCEPTS -- CIRCUIT ELEMENTS FOR ALTERING FREQUENCY:
1. Series R, C to ground (low pass): Single pole at 1/(2*pi*R*C)
2. Series C, R to ground (high pass): Zero at DC, pole at 1/(2*pi*R*C)
3. Series R, L to ground (high pass): Zero at DC, pole at R/(2*pi*L)
4. Series L, R to ground (low pass): single pole at R/(2*pi*L)
5. Series LRC. 2 Complex poles. Presents low impedance (R) at resonance,
which is at 1/(2*pi*sqrt(L*C)). Impedance increases away from
resonance.
6. Parallel RLC. 2 Complex Poles. Presents high impedance (R) at
resonance which is at 1/(2*pi*sqrt(L*C)). Impedance decreases away
from resonance.
7. Transformers: Separate installment (later).
Other Notes:
Stability and feedback. The issue with an accumulated 180 degree
phase shift is that 180 degrees phase shift transforms the negative
feedback into positive feedback. With positive feedback and greater
unity "loop gain" the circuit oscillates! The 135 degree accumulated
phase shift mentioned in the FAQ provides 45 degree "margin" against
this oscillation. The "goal" of negative feedback compensation is
to get to less than unity LOOP gain before 180 degrees of phase
shift has accumulated (preferably with some phase margin - 45 degree
margin given in the FAQ).